Hardware Overview

The Genpix SkyWalker-1 is a standalone USB 2.0 DVB-S satellite receiver built around two primary ICs: a Cypress FX2LP USB microcontroller and a Broadcom BCM4500 satellite demodulator. The FX2 handles all USB communication, LNB control, and DiSEqC signaling, while the BCM4500 performs RF demodulation, forward error correction, and outputs an MPEG-2 transport stream on an 8-bit parallel bus.

Core Components

Component	Part Number	Role
MCU	Cypress CY7C68013A (FX2LP)	USB 2.0 Hi-Speed controller, 8051 core at 48 MHz
Demodulator	Broadcom BCM4500	DVB-S / Turbo / DCII / DSS demodulator, 128-pin MQFP
EEPROM	24Cxx-family (I2C address 0x51)	FX2 firmware storage, serial number, calibration data
Tuner/LNB	Unknown IC (I2C address 0x10)	Tuner or LNB controller on shared I2C bus

Board Block Diagram

                        +--[ I2C EEPROM 0x51 ]
                        |
USB 2.0 HS             |    I2C Bus (400 kHz)
Host PC  <----> [ CY7C68013A FX2LP ] <-----> [ BCM4500 Demod 0x08 ]
                  |  8051 @ 48 MHz  |            |
                  |  GPIF Engine    |<-----------+  8-bit parallel TS
                  |  EP2 Bulk IN    |
                  |  GPIO (P0/P3)   |---> [ 22 kHz Osc ] ---> LNB/Coax
                  |                 |---> [ LNB Voltage Ctrl ]
                  +-----------------+
                        |
                        +--[ Tuner/LNB IC 0x10 ]

The GPIF engine inside the FX2 transfers the BCM4500’s transport stream output directly into USB bulk endpoint EP2 with zero firmware intervention in the data path. This hardware-managed pipeline provides approximately 5x bandwidth headroom over the maximum DVB-S transport stream rate.

Supported Modulations

Index	Modulation	Constant	FEC Family
0	DVB-S QPSK Standard	ADV_MOD_DVB_QPSK	Viterbi + Reed-Solomon
1	Turbo-coded QPSK Turbo	ADV_MOD_TURBO_QPSK	Turbo
2	Turbo-coded 8PSK Turbo	ADV_MOD_TURBO_8PSK	Turbo
3	Turbo-coded 16QAM Turbo	ADV_MOD_TURBO_16QAM	Turbo
4	Digicipher II Combo DCII	ADV_MOD_DCII_C_QPSK	DCII
5	Digicipher II I-stream (split) DCII	ADV_MOD_DCII_I_QPSK	DCII
6	Digicipher II Q-stream (split) DCII	ADV_MOD_DCII_Q_QPSK	DCII
7	Digicipher II Offset QPSK DCII	ADV_MOD_DCII_C_OQPSK	DCII
8	DSS QPSK DSS	ADV_MOD_DSS_QPSK	Viterbi + Reed-Solomon
9	DVB-S BPSK Standard	ADV_MOD_DVB_BPSK	Viterbi + Reed-Solomon

DVB-S2 Not Supported

DVB-S2 is not supported by the SkyWalker-1. This is a fundamental hardware limitation of the BCM4500 demodulator silicon — it was designed before the DVB-S2 standard was ratified (March 2005) and contains no LDPC or BCH decoder hardware. No firmware update can add DVB-S2 support. See the DVB-S2 Incompatibility page for the full technical analysis.

Architecture Overview

USB Interface

EP0 for vendor commands (tuning, LNB control, status). EP2 for bulk MPEG-2 transport stream data. VID 0x09C0, PID 0x0203. See USB Interface.

BCM4500 Demodulator

Indirect register access via I2C (0xA6/0xA7/0xA8 protocol). Two FEC decoder paths: turbo codes and legacy Viterbi/Reed-Solomon. See Demodulator Interface.

GPIF Streaming

Hardware-managed data path. 8-bit parallel bus from BCM4500 to EP2 FIFO via GPIF master read. AUTOIN auto-commits full packets to USB. See GPIF Streaming.

I2C Bus

400 kHz bus connecting FX2 to BCM4500 (0x08), tuner IC (0x10), and EEPROM (0x51). Bit-banged DiSEqC on separate GPIO pins. See I2C Bus Architecture.

FEC Architecture

The BCM4500 contains two distinct FEC decoder paths:

1. Advanced Modulation Turbo FEC Decoder — Iterative turbo code decoder supporting QPSK (rates 1/4, 1/2, 3/4), 8PSK (rates 2/3, 3/4, 5/6, 8/9), 16QAM (rate 3/4), with Reed-Solomon (t=10) outer code.

2. Legacy DVB/DIRECTV/DCII-Compliant FEC Decoder — Concatenated Viterbi inner decoder (convolutional code, rates 1/2 through 7/8) plus Reed-Solomon outer decoder.

There is no LDPC or BCH decoder hardware. The turbo FEC codes are Broadcom/EchoStar proprietary and are not part of any open standard.

Firmware

The SkyWalker-1 boots from an on-board I2C EEPROM containing firmware in Cypress C2 format. No host-side firmware files are required. Multiple stock firmware versions have been identified:

Firmware	Version ID	Build Date	Notes
v2.06.04	0x020604	2007-07-13	Original release, 61 functions
v2.13.01	0x020D01	2010-03-12	Latest revision, 82-88 functions
Custom v3.01.0	0x030100	2026-02-12	Open-source SDCC + fx2lib, RAM-loaded

See Firmware Version Comparison for a full analysis of the differences between stock firmware versions.